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DM8127 Development Strategy for Image recognition-- Board Startup process

2025-01-17 Update From: SLTechnology News&Howtos shulou NAV: SLTechnology News&Howtos > Servers >

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Shulou(Shulou.com)06/02 Report--

The last article, "Image recognition DM8127 Development Strategy-Development Environment Building", introduced the construction of DM8127 development environment. According to my development strategy, this article is to write "Image recognition DM8127 Development Strategy-Software Architecture Analysis and compilation", but found that if we do not figure out how to start the DM8127 board, it is not good to analyze the whole RDK compilation process, so I first describe the startup process of the DM8127 board. Let everyone understand the whole working process of DM8127 from the point of view of hardware and software operation, and then learn the architecture of the development package in IPNC_RDK and the migration of the development package.

Power on-- ROM CODE run on → DM8127 internal chip-- → ROM CODE reads SYSBOOT PINS level status to determine whether to read ubootmin from NAND FLASH BOOT or UART0 serial port BOOT or SD card BOOT or PCIe BOOT or EMAC BOOT or XIP BOOT-- → and run ubootmin (ubootmin takes ARM control)-→ reads u-boot and runs u-boot (u-boot takes ARM control)-→ reads linux kernel BIN and runs linux kernel (linux-) 2.6.37 take control of ARM until the board is reset or power off)-→ mounts the file system (which can be ubifs stored in NAND FLASH Squashfs, or NFS)-- → runs scripts for the file system-- → runs IPNC_RDK 's entire DEMO applications system_server,boa and live555, etc., starts VPSS M3 core, starts VIDEO M3 core, and starts floating-point DSP C674X core.

The whole process can be understood intuitively through the picture above.

First, run ubootmin

At the beginning of power up, there is ROM CODE inside the DM8127 main chip, which is run using the internal RAM on the chip, but not the off-chip DDR3. If the newly made board does not have any programs, as long as the power supply sequence of the TPS659113 power management chip is normal and the main crystal oscillator works normally, then the ROM CODE will run normally and read the SYSBOOT PINS first (that is, the pin state of the BOOT MODE external pull-down resistors) If the corresponding NAND FLASH or SD card or PCIe interface does not have a program, then DM8127 will continue to output C C C C C C through UART0. .. Try to download the UBOOT-OPTI BIN file by communication through UART0 (this UBOOT-OPTI will be analyzed later when we introduce the UBOOT migration).

As for the second step of running ubootmin, you can explain it in two ways:

1, that is, before the first step is not powered on, through the TF card (SD card), the TF card pre-COPY two files: MLO and u-boot.bin to the card, the TF card is formatted into FAT32, and the card is less than 8 times the speed. These two files are ubootmin compilation and uboot-2010.06 compilation, which will be mentioned later. The ubootmin compiled is the MLO file, and the uboot-2010.06 compiled is u-boot.bin. The TF (SD card) is first plugged into the board, and then the board is powered on, so that it will BOOT from the SD card and run MLO, that is, ubootmin. Ubootmin will do a lot of initialization of the underlying driver here, including DDR3 initialization. It is mentioned here that ubootmin is still running on-chip RAM, not on external DDR3.

2, there is also a very large-scale factory production, NAND FLASH can burn ubootmin BIN files and uboot-2010.06 BIN files, kernel BIN files, file system BIN files, and then paste to the SMT factory, then the DM8127 board taken from the factory will be set to NAND BOOT by default according to the hardware circuit when there is no hardware short circuit, so as soon as it is powered on, it will run ubootmin in the NAND FLASH.

In the absence of a program, in fact, most of them use the first way, SD card BOOT, to run ubootmin. When we finish writing ubootmin and UBOOTBIN to NAND, we don't need SD card BOOT. The so-called BOOT ubootmin through the level state of SYSBOOT PINS external pull-up resistor and pull-down resistor:

It can only be said that the priority is which way to BOOT, and the internal ROM CODE of TI will automatically find the corresponding ubootmin from the priority BOOT MODE. For example, if you give priority to BOOT from NAND, but NANDFALSH does not have ubootmin, then ROM CODE will find the SD card BOOT (also known as MMC BOOT). If there is no MLO in the SD card and MMC BOOT boot.binbinROM CODE will continue to find SPI BOOT, if SPI BOOT is not successful, continue to find UART0 port to BOOT,ROM CODE will continue to list several BOOT modes.

2. Run a complete uboot

After ubootmin initialization, it reads the uboot-2010.06 BIN file and runs the full uboot, uboot-2010.06. If the complete uboot-2010.06 is running properly, you can burn and write it through operations such as network TFTP, and then run the linux kernel. This complete uboot runs on DDR3 (the code mapping to the DDR3 storage address field cannot conflict with kernel), and then write separately after the migration of uboot-2010.06, which is not cumbersome here.

Run the linux kernel

Uboot-2010.06 runs the kernel in a variety of ways (reading the BIN file in NAND or downloading the kernel by TFTP). Control of ARM is given to the kernel, and the linux kernel also runs on DDR3.

Fourth, the kernel mounts the file system

This also does not need to be cumbersome, have done linux embedded development all know, research and development first use NFS debugging pass, and then make ubifs BIN files or squashfs BIN files to burn to the board NAND FLASH.

Fifth, execute the script of the file system

You will first run a bunch of scripts in the file system etc, and then run the / etc/init.d/finish_ubifs.sh script:

Cd/opt/ipnc

. / init.sh

. / system_server

Sleep7

. / autorun_ipnc.sh

The contents of these scripts can be opened in the corresponding NFS file system directory.

Run the DEMO program, all of which will be opened in the system_server application, or in parallel. They are all LINUX application-level programs.

VI. Startup of the other three cores

There are corresponding load scripts to start VPSS M3 core (ipnc_rdk_fw_m3vpss.xem3), VIDEO M3 core (ipnc_rdk_fw_m3video.xem3) and DSP core (ipnc_rdk_fw_c6xdsp.xe674). See the following two pictures:

Pay attention to the path of the above two pictures to know where these programs and scripts are placed.

In fact, these scripts can be executed in system_server applications using methods similar to the following:

System (". / scripts/load_vpss.sh&")

System (". / scripts/load_video.sh&")

System (". / scripts/load_c6xdsp.sh&")

All right, the startup process of DM8127 is written here, to in-depth understanding, it is recommended to take the board for debugging, the theory is not as good as manual verification, through the actual operation, it is better to grasp the development method of DM8127 ARM+ floating-point DSP.

(beside the point, some netizens know whether DM8127 can do deep learning algorithm through my QQ:2505133162. I have come to a personal conclusion through many aspects: DM8127 is not suitable for complex deep learning algorithms, but can only do license plate recognition, face recognition, intelligent security IVS products, TI DAVINCI platform has a DM505 solution suitable for autopilot, can do some deep learning algorithms, we do not have this platform yet.)

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